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Publications of Paolo Burgio
2019
| F1/10: An Open-Source Autonomous Cyber-Physical Platform, |
2018
| Convolutional Neural Networks on Embedded Automotive Platforms: A Qualitative Comparison., 2018 International Conference on High Performance Computing & Simulation, HPCS 2018, Orleans, France |
| Mapping, Scheduling, and Schedulability Analysis – book chapter., High-Performance and Time-Predictable Embedded Computing, River publisher | [URL] |
2017
| High-performance parallelisation of real-time applications, Embedded World Conference 2017 |
| An emulation framework for closed source components in multi-core automotive platforms, Forum on specification & Design Languages (FDL) 2017 – Special Session on Design and test of Automotive Embedded System | [URL] |
| Adaptive Coordination in Autonomous Driving: Motivations and Perspectives, The International Conference on Enabling Technologies: Infrastructure for Collaborative Enterprises (WETICE) 2017 | [DOI] | [URL] |
| A Software Stack for Next-Generation Automotive Systems on Many-Core Heterogeneous PlatformsJournal of Microprocessors and Microsystems (MICPRO), Elsevier, 2017 | [DOI] | [URL] |
2016
| Enabling predictable parallelism in single-GPU systems with persistent CUDA threads, in: Euromicro Conference on Real-Time Systems (ECRTS), Work-in-Progress section, 2016 |
[URL] |
| A Software Stack for Next-Generation Automotive Systems on Many-Core Heterogeneous Platforms , in: Digital Systems Design (DSD), 2016 |
[DOI] | [URL] |
2015
| A memory-centric approach to enable timing-predictability within embedded many-core accelerators, in Real-Time and Embedded Systems and Technologies (RTEST), 2015 CSI Symposium on , vol., no., pp.1-8, 7-8 Oct. 2015 |
[DOI] |
| Efficient implementation of Genetic Algorithms on GP-GPU with scheduled persistent CUDA threads, in Parallel Architectures, Algorithms and Programming (PAAP), 2015 Seventh International Symposium on , vol., no., pp.6-12, 12-14 Dec. 2015 |
[DOI] |
| P-SOCRATES: A parallel software framework for time-critical many-core systems (2015), in: Microprocessors and Microsystems, “”:””(-) |
[DOI] | [URL] |
| Simulating next-generation Cyber-physical computing platforms, in: De-CPS ’15, Proceedings of the 2nd Workshop Challenges and New Approaches for Dependable and Cyber-Physical System Engineering. Published in: Ada User Journal . Dec 2015, Vol. 36 Issue 4, p259-263. |
2014
| A HLS-Based Toolflow to Design Next-Generation Heterogeneous Many-Core Platforms with Shared Memory, in: 12th IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2014, Milano, Italy, August 26-28, 2014, pages 130–137, 2014 |
[DOI] |
| A tightly-coupled hardware controller to improve scalability and programmability of shared-memory heterogeneous clusters, in: Design, Automation Test in Europe Conference Exhibition (DATE), pages 1-4, 2014 |
[DOI] |
| Tightly-coupled hardware support to dynamic parallelism acceleration in embedded shared memory clusters, in: Design, Automation Test in Europe Conference Exhibition (DATE), pages 1-6, 2014 |
[DOI] |
2013
| Architecture and programming model support for efficient heterogeneous computing on tigthly-coupled shared-memory clusters, in: Design and Architectures for Signal and Image Processing (DASIP), 2013 Conference on, pages 22-29, 2013 |
| Enabling fine-grained OpenMP tasking on tightly-coupled shared memory clusters, in: Design, Automation Test in Europe Conference Exhibition (DATE), 2013, pages 1504-1509, 2013 |
[DOI] |
| Variation-tolerant OpenMP tasking on tightly-coupled processor clusters, in: Design, Automation Test in Europe Conference Exhibition (DATE), 2013, pages 541-546, 2013 |
[DOI] |
2012
| Fast and lightweight support for nested parallelism on cluster-based embedded many-cores, in: Design, Automation Test in Europe Conference Exhibition (DATE), 2012, pages 105-110, 2012 |
[URL] |
| OpenMP-based Synergistic Parallelization and HW Acceleration for On-Chip Shared-Memory Clusters, in: 15th Euromicro Conference on Digital Systems Design (DSD), Cesme, Izmir, Turkey, pages 751 – 758, 2012 |
[DOI] | [URL] |
| OpenMP-based Synergistic Parallelization and HW Acceleration for On-Chip Shared-Memory Clusters (Poster), in: Design Automation Conference (DAC) 2012, San Francisco, CA, 2012 |
[URL] |
2011
| Bus Access Design for Combined Worst and Average Case Execution Time Optimization of Predictable Real-Time Applications on Multiprocessor Systems-on-Chip, in: Real-Time and Embedded Technology and Applications Symposium (RTAS), 2011 17th IEEE, Chicago, IL, pages 291 – 301, 2011 |
[DOI] |
| MPOpt-Cell: a high-performance data-flow programming environment for the CELL BE processor, in: Computing Frontiers (CF) 2011, Ischia, Italy, pages 11:1–11:2, ACM, 2011 |
[DOI] | [URL] |
| Supporting OpenMP on a multi-cluster embedded MPSoC (2011), in: Microprocessors and Microsystems, 35:8(668 – 682) |
[DOI] | [URL] |
2010
| Adaptive TDMA bus allocation and elastic scheduling: A unified approach for enhancing robustness in multi-core RT systems, in: Computer Design (ICCD), 2010 IEEE International Conference on, pages 187 -194, 2010 |
[DOI] |
| Evaluating OpenMP Support Costs on MPSoCs, in: Digital System Design: Architectures, Methods and Tools (DSD), 2010 13th Euromicro Conference on, Lille, pages 191 — 198, IEEE Press, 2010 |
[DOI] |
| Simulating Future Automotive Systems, DEIS – University of Bologna, 2010 |
[URL] |
| Vertical stealing: robust, locality-aware do-all workload distribution for 3D MPSoCs, in: Proceedings of the 2010 international conference on Compilers, architectures and synthesis for embedded systems, Scottsdale, Arizona, USA, pages 207–216, ACM, 2010 |
[DOI] |